module control_baud(CLK,RSTN,SAMPLING);//BAUD_DETECTION 波特率检测，BAUD_RATE波特率，SAMPLING采样速率
input CLK,RSTN;
output SAMPLING;
wire CLK,BAUD_DETECTION,RSTN;
reg SAMPLING;
reg[8:0] cnt;
reg temp;

assign BAUD_DETECTION = 0;
always@( posedge CLK or negedge RSTN) begin
	if(~RSTN) begin		 						 //复位时检验波特率位，改变波特率
		if(BAUD_DETECTION)  begin
		temp<=1; 									//波特率9600,设定16倍波特率，16000000（16M）/9600*16=104.17 取104
		end
		else begin
		temp<=0;  									//波特率4800,设定16倍波特率，16000000（16M）/4800*16=208.33 取208
		end
	end
end
always@(posedge CLK or negedge RSTN) begin
	if(~RSTN) cnt<=0;
	else begin
	if(temp) begin
		if(cnt==8'd52) begin
			cnt<=cnt+1'b1;
			SAMPLING<=1;
		end
		else if(cnt==8'd104) begin
			cnt<=0;
			SAMPLING<=0;
		end
		else cnt<=cnt+1'b1;
	end
	else begin
		if(cnt==9'd208) begin
			cnt<=cnt+1'b1;
			SAMPLING<=1;
		end
		else if(cnt==9'd416) begin
			cnt<=0;
			SAMPLING<=0;
		end
		else cnt<=cnt+1'b1;
	end 
end
end
endmodule
		